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MCQs

Total Questions : 215 | Page 19 of 22 pages
Question 181. . The checksum method is used to test ________.
  1.    ROM
  2.    EEPROM
  3.    FPLA
  4.    RAM
 Discuss Question
Answer: Option A. -> ROM
Question 182. . To reduce the number of pins on high-capacity DRAM chips, address ________ is used so that a single pin can accommodate two different address bits.
  1.    conversion
  2.    programming
  3.    multiplexing
  4.    firmware
 Discuss Question
Answer: Option C. -> multiplexing
Question 183. . The minimum number of address lines needed for a 64K memory is ________.
  1.    10
  2.    12
  3.    14
  4.    16
 Discuss Question
Answer: Option D. -> 16
Question 184. . The 2147 4K × 1 static RAM contains 4096 storage locations storing one bit each. ________ 2147 RAM memory chip(s) is/are needed to configure an 8K × 8 memory.
  1.    One
  2.    Four
  3.    Eight
  4.    Sixteen
 Discuss Question
Answer: Option D. -> Sixteen
Question 185. . The number of 16k × 4 memories needed to construct a 128k × 8 memory is ________.
  1.    4
  2.    8
  3.    12
  4.    16
 Discuss Question
Answer: Option D. -> 16
Question 186. . A CD-ROM is a form of read-only memory in which data are stored as ________.
  1.    magnetic "bubbles"
  2.    magnetized spots
  3.    "pits" on an optical disk
  4.    tiny "pinholes" in an opaque substance
 Discuss Question
Answer: Option C. -> "pits" on an optical disk
Question 187. . All rows in a 2118 dynamic RAM need to be refreshed ________.
  1.    every second
  2.    every millisecond
  3.    every 50 milliseconds
  4.    every 2 milliseconds
 Discuss Question
Answer: Option D. -> every 2 milliseconds
Question 188. . A type of read/write memory available with MOS technology is ________.
  1.    SRAM
  2.    DRAM
  3.    both of the above
  4.    none of the above
 Discuss Question
Answer: Option C. -> both of the above
Question 189. . ROM access time is defined as ________.
  1.    how long it takes to program the ROM chip
  2.    being the difference between the READ and WRITE times
  3.    the time it takes to get valid output data after a valid address is applied
  4.    the time required to activate the address lines after the ENABLE line is at a valid level
 Discuss Question
Answer: Option C. -> the time it takes to get valid output data after a valid address is applied
Question 190. 3. The memory operation that presents data on the memory outputs after entering a new address is called ________.
  1.    a read cycle
  2.    a write cycle
  3.    a refresh cycle
  4.    a chip select
 Discuss Question
Answer: Option A. -> a read cycle

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