Sail E0 Webinar

MCQs

Total Questions : 215 | Page 17 of 22 pages
Question 161. . Eight bits of digital data are normally referred to as a:
  1.    group.
  2.    byte.
  3.    word.
  4.    cell.
 Discuss Question
Answer: Option B. -> byte.
Question 162. . Which is not a hard disk performance parameter?
  1.    Seek time
  2.    Break time
  3.    Latency period
  4.    Access time
 Discuss Question
Answer: Option B. -> Break time
Question 163. . The ideal memory ________.
  1.    has high storage capacity
  2.    is nonvolatile
  3.    has in-system read and write capacity
  4.    has all of the above characteristics
 Discuss Question
Answer: Option D. -> has all of the above characteristics
Question 164. . To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed?
  1.    The address input
  2.    The output enable
  3.    The chip enable
  4.    The data input
 Discuss Question
Answer: Option C. -> The chip enable
Question 165. . EEPROM stands for ________.
  1.    encapsulated electrical programmable read-only memory
  2.    elementary electrical programmable read-only memory
  3.    electrically erasable programmable read-only memory
  4.    elementary erasable programmable read-only memory
 Discuss Question
Answer: Option C. -> electrically erasable programmable read-only memory
Question 166. . L1 is known as ________.
  1.    primary cache
  2.    secondary cache
  3.    DRAM
  4.    SRAM
 Discuss Question
Answer: Option A. -> primary cache
Question 167. . Describe the timing diagram of a write operation.
  1.    First the data is set on the data bus and the address is set, then the write pulse stores the data.
  2.    First the address is set, then the data is set on the data bus, and finally the read pulse stores the data.
  3.    First the write pulse stores the data, then the address is set, and finally the data is set on the data bus.
  4.    First the data is set on the data bus, then the write pulse stores the data, and finally the address is set.
 Discuss Question
Answer: Option A. -> First the data is set on the data bus and the address is set, then the write pulse stores the data.
Question 168. . Which of the following is one of the basic characteristics of DRAMs?
  1.    DRAMs must have a constantly changing input.
  2.    DRAMs must be periodically refreshed in order to be able to retain data.
  3.    DRAMs have a broader "dynamic" storage range than other types of memories.
  4.    DRAMs are simpler devices than other types of memories.
 Discuss Question
Answer: Option B. -> DRAMs must be periodically refreshed in order to be able to retain data.
Question 169. . What is the bit storage capacity of a ROM with a 1024 × 8 organization?
  1.    1024
  2.    2048
  3.    4096
  4.    8192
 Discuss Question
Answer: Option D. -> 8192
Question 170. . Assume a ROM to be tested is compared with a known good ROM. If the checksums differ, the ROM is ________.
  1.    very likely to be good
  2.    definitely good
  3.    very likely to be bad
  4.    definitely bad
 Discuss Question
Answer: Option D. -> definitely bad

Latest Videos

Latest Test Papers