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MCQs

Total Questions : 457 | Page 2 of 46 pages
Question 11. "What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA?
A. Propagation delay will increase
B. FPGA area will increase
C. Wastage of logic modules will not be prevented
D. Number of interconnected paths in device will decrease"
  1.    A & B
  2.    C & D
  3.    A & D
  4.    B & C
 Discuss Question
Answer: Option A. -> A & B
Question 12. A debouncing circuit is
  1.    An astable MV
  2.    A bistable MV
  3.    A latch
  4.    A monostable MV
 Discuss Question
Answer: Option C. -> A latch
Question 13. The inverter is ___________
  1.    NOT gate
  2.    OR gate
  3.    AND gate
  4.    None of the above
 Discuss Question
Answer: Option A. -> NOT gate
Question 14. What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view?
  1.    Input operation
  2.    Tristate output operation
  3.    Bi-directional I/O pin access
  4.    All of the above
 Discuss Question
Answer: Option D. -> All of the above
Question 15. Most of the digital computers do not have floating point hardware because
  1.    Floating point hardware is costly
  2.    It is slower than software
  3.    It is not possible to perform floating point addition by hardware
  4.    Of no specific reason
 Discuss Question
Answer: Option A. -> Floating point hardware is costly
Question 16. The binary number 10101 is equivalent to decimal number ___________.
  1.    19
  2.    12
  3.    27
  4.    21
 Discuss Question
Answer: Option D. -> 21
Question 17. Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is.
  1.    10 CPS
  2.    120 CPS
  3.    12 CPS
  4.    None of the above
 Discuss Question
Answer: Option C. -> 12 CPS
Question 18. An AND gate will function as OR if
  1.    All the inputs to the gates are “1”
  2.    All the inputs are ‘0’
  3.    Either of the inputs is “1”
  4.    All the inputs and outputs are complemente'
 Discuss Question
Answer: Option D. -> All the inputs and outputs are complemente'
Question 19. Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins?
  1.    PLCC
  2.    QFP
  3.    PGA
  4.    BGA
 Discuss Question
Answer: Option D. -> BGA
Question 20. The NOR gate is OR gate followed by ___________.
  1.    AND gate
  2.    NAND gate
  3.    NOT gate
  4.    None of the above
 Discuss Question
Answer: Option C. -> NOT gate

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