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Total Questions : 97 | Page 4 of 10 pages
Question 31. Consider the following sequence of micro-operations.MBR ← PCMAR ← XPC ← YMemory ← MBRWhich one of the following is a possible operation performed by this sequence?
  1.    Instruction fetch
  2.    Operand fetch
  3.    Conditional branch
  4.    Initiation of interrupt service
 Discuss Question
Answer: Option D. -> Initiation of interrupt service


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Question 32. The number of elements that can be sorted in Θ(log n) time using heap sort is
  1.    Î˜(1)
  2.    Î˜(√log n)
  3.    Î˜(log n/log log n)
  4.    Î˜(log n)
 Discuss Question
Answer: Option C. -> Θ(log n/log log n)


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Question 33. Consider a hard disk with 16 recording surfaces (0-15) having 16384 cylinders (0-16383) and each cylinder contains 64 sectors (0-63). Data storage capacity in each sector is 512 bytes. Data are organized cylinder-wise and the addressing format is . A file of size 42797 KB is stored in the disk and the starting disk location of the file is . What is the cylinder number of the last sector of the file, if it is stored in a contiguous manner?
  1.    1281
  2.    1282
  3.    1283
  4.    1284
 Discuss Question
Answer: Option D. -> 1284


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Question 34. What is the logical translation of the following statement? "None of my friends are perfect.
  1.    ÆŽx(F(x) á´§ ¬ P(x))
  2.    ÆŽx(¬ F(x) á´§ P(x))
  3.    ÆŽx(¬ F(x) á´§ ¬ P(x))
  4.    ¬ ÆŽx(F(x) á´§ P(x))
 Discuss Question
Answer: Option D. -> ¬ ÆŽx(F(x) á´§ P(x))


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Question 35. A file system with 300 GByte disk uses a file descriptor with 8 direct block addresses, 1 indirect block address and 1 doubly indirect block address. The size of each disk block is 128 Bytes and the size of each disk block address is 8 Bytes. The maximum possible file size in this file system is
  1.    3 KBytes
  2.    35 KBytes
  3.    280 KBytes
  4.    dependent on the size of the disk
 Discuss Question
Answer: Option B. -> 35 KBytes


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Question 36. Consider a source computer (S) transmitting a file of size 106 bits to a destination computer (D) over a network of two routers (R1 and R2) and three links (L1, L2 and L3). L1 connects S to R1; L2 connects R1 to R2; and L3 connects R2 to D. Let each link be of length 100 km. Assume signals travel over each link at a speed of 108 meters per second. Assume that the link bandwidth on each link is 1Mbps. Let the file be broken down into 1000 packets each of size 1000 bits. Find the total sum of transmission and propagation delays in transmitting the file from S to D?
  1.    1005 ms
  2.    1010 ms
  3.    3000 ms
  4.    3003 ms
 Discuss Question
Answer: Option A. -> 1005 ms


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Question 37. Consider the virtual page reference string 1, 2, 3, 2, 4, 1, 3, 2, 4, 1 on a demand paged virtual memory system running on a computer system that has main memory
size of 3 page frames which are initially empty. Let LRU, FIFO and OPTIMAL denote the number
of page faults under the corresponding page replacement policy. Then
  1.    OPTIMAL < LRU < FIFO
  2.    OPTIMAL < FIFO < LRU
  3.    OPTIMAL = LRU
  4.    OPTIMAL = FIFO
 Discuss Question
Answer: Option B. -> OPTIMAL < FIFO < LRU


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Question 38. Suppose R1(A, B) and R2(C, D) are two relation schemas. Let r1 and r2 be the corresponding relation instances. B is a foreign key that refers to C in R2. If data in r1 and r2 satisfy referential integrity constraints, which of the following is ALWAYS TRUE?
  1.    Ï€B(r1) - Ï€C(r2) = Ø
  2.    Ï€C(r2) - Ï€B(r1) = Ø
  3.    Ï€B(r1) = Ï€C(r2)
  4.    Ï€B(r1) - Ï€C(r2) ≠ Ø
 Discuss Question
Answer: Option A. -> πB(r1) - πC(r2) = Ø


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Question 39. The procedure given below is required to find and replace certain characters inside an input character string
supplied in array A. The characters to be replaced are supplied in array oldc, while their respective
replacement characters are supplied in array newc. Array A has a fixed length of five characters, while
arrays oldc and newc contain three characters each. However, the procedure is flawed. void find_and_replace (char *A, char *oldc, char *newc) {             for (int i=0; i
  1.    None
  2.    2 only
  3.    3 and 4 only
  4.    4 only
 Discuss Question
Answer: Option C. -> 3 and 4 only


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Question 40. The following code segment is executed on a processor which allows only register operands in its instructions. Each instruction can have atmost two source operands and one destination operand. Assume that all variables are dead after this code segment.c = a + b;d = c * a;e = c + a;x = c * c;if (x > a) {     y = a * a;}else {      d = d * d;      e = e * e;}What is the minimum number of registers needed in the instruction set architecture of the processor to compile this code segment without any spill to memory? Do not apply any optimization other than optimizing register allocation.
  1.    3
  2.    4
  3.    5
  4.    6
 Discuss Question
Answer: Option B. -> 4


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