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MCQs

Total Questions : 25 | Page 1 of 3 pages
Question 1.  A digital logic device used as a buffer should have what input/output characteristics?
  1.    high input impedance and high output impedance
  2.    low input impedance and high output impedance
  3.    low input impedance and low output impedance
  4.    high input impedance and low output impedance
 Discuss Question
Answer: Option D. -> high input impedance and low output impedance
Question 2.  What is the standard TTL noise margin?
  1.    5.0 V
  2.    0.2 V
  3.    0.8 V
  4.    0.4 V
 Discuss Question
Answer: Option D. -> 0.4 V
Question 3.  The range of a valid LOW input is:
  1.    0.0 V to 0.4 V
  2.    0.4 V to 0.8 V
  3.    0.4 V to 1.8 V
  4.    0.4 V to 2.4 V
 Discuss Question
Answer: Option B. -> 0.4 V to 0.8 V
Question 4.  Ten TTL loads per TTL driver is known as:
  1.    noise immunity
  2.    power dissipation
  3.    fanout
  4.    propagation delay
 Discuss Question
Answer: Option C. -> fanout
Question 5.  Which digital IC package type makes the most efficient use of printed circuit board space?
  1.    SMT
  2.    TO can
  3.    flat pack
  4.    DIP
 Discuss Question
Answer: Option A. -> SMT
Question 6.  
The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:
  1.    level-shifter
  2.    tri-state shifter
  3.    translator
  4.    level-shifter or translator
 Discuss Question
Answer: Option D. -> level-shifter or translator
Question 7.  When an IC has two rows of parallel connecting pins, the device is referred to as:
  1.    a QFP
  2.    a DIP
  3.    a phase splitter
  4.    CMOS
 Discuss Question
Answer: Option B. -> a DIP
Question 8.  Which of the following summarizes the important features of emitter-coupled logic (ECL)?
  1.    negative voltage operation, high speed, and high power consumption
  2.    good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time
  3.    slow propagation time, high frequency response, low power consumption, and high output voltage swings
  4.    poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power
 Discuss Question
Answer: Option A. -> negative voltage operation, high speed, and high power consumption
Question 9. . Low power consumption achieved by CMOS circuits is due to which construction characteristic?
  1.    complementary pairs
  2.    connecting pads
  3.    DIP packages
  4.    small-scale integration
 Discuss Question
Answer: Option A. -> complementary pairs
Question 10.  What quantities must be compatible when interfacing two different logic families?
  1.    only the currents
  2.    both the voltages and the currents
  3.    only the voltages
  4.    both the power dissipation and the impedance
 Discuss Question
Answer: Option B. -> both the voltages and the currents

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